Patent Number: 8,501,575

Title: Method of forming multilayer capacitors in a printed circuit substrate

Abstract: Methods of forming embedded, multilayer capacitors in printed circuit boards wherein copper or other electrically conductive channels are formed on a dielectric substrate. The channels may be preformed using etching or deposition techniques. A photoimageable dielectric is an upper surface of the laminate. Exposing and etching the photoimageable dielectric exposes the space between the copper traces. These spaces are then filled with a capacitor material. Finally, copper is either laminated or deposited atop the structure. This upper copper layer is then etched to provide electrical interconnections to the capacitor elements. Traces may be formed to a height to meet a plane defining the upper surface of the dielectric substrate or thin traces may be formed on the remaining dielectric surface and a secondary copper plating process is utilized to raise the height of the traces.

Inventors: Das; Rabindra N. (Vestal, NY), Egitto; Frank D. (Binghamton, NY), Lin; How T. (Vestal, NY), Lauffer; John M. (Waverly, NY), Markovich; Voya R. (Endwell, NY)

Assignee: Endicott Interconnect Technologies, Inc.

International Classification: H01G 4/00 (20060101)

Expiration Date: 2021-08-06 0:00:00