Patent Number: 8,574,976

Title: Semiconductor device and manufacturing method thereof

Abstract: A TFT having a high threshold voltage is connected to the source electrode of each TFT that constitutes a CMOS circuit. In another aspect, pixel thin-film transistors are constructed such that a thin-film transistor more distant from a gate line drive circuit has a lower threshold voltage. In a further aspect, a control film that is removable in a later step is formed on the surface of the channel forming region of a TFT, and doping is performed from above the control film.

Inventors: Yamazaki; Shunpei (Tokyo, JP), Kusumoto; Naoto (Kanagawa, JP), Ohnuma; Hideto (Kanagawa, JP), Tanaka; Koichiro (Kanagawa, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: H01L 21/00 (20060101)

Expiration Date: 1/05/12017