Patent Number: 8,575,007

Title: Selective electromigration improvement for high current C4s

Abstract: The invention includes embodiments of a method for designing a flip chip and the resulting structure. The starting point is a flip chip with a semiconductor substrate, one or more wiring levels, and a plurality of I/O contact pads (last metal pads/bond pads) for receiving and sending electrical current. There is also a plurality of C4 bumps for connecting the I/O contact pads to another substrate. Then it is determined which of the C4s of the plurality of C4 bumps have a level of susceptibility to electromigration damage that meets or exceeds a threshold level of susceptibility, and in response, plating a conductive structure with a high electrical current carrying capacity (such as a copper pillar, copper pedestal, or partial copper pedestal) onto the corresponding I/O contact pads and adding a solder ball to a top portion of the conductive structure. The resulting structure is a flip chip wherein only a select few C4 bumps use enhanced C4s (such as copper pedestals) reducing the chance of defects.

Inventors: Daubenspeck; Timothy Harrison (Colchester, VT), Gambino; Jeffrey P. (Westford, VT), Muzzy; Christopher David (Burlington, VT), Sauter; Wolfgang (Hinesburg, VT), Wassick; Thomas Anthony (LaGrangeville, NY)

Assignee: International Business Machines Corporation

International Classification: H01L 21/326 (20060101); H01L 21/44 (20060101)

Expiration Date: 1/05/12017