Patent Number: 8,576,601

Title: Content addressable memory

Abstract: One embodiment provides a content addressable memory, including: a pair of spin MOSFETs including: a first spin MOSFET whose magnetization state is set in accordance with stored data; and a second spin MOSFET whose magnetization state is set in accordance with the stored data, the second spin MOSFET being connected in parallel with the first spin MOSFET; a first wiring configured to apply a gate voltage so that any one of the first spin MOSFET and the second spin MOSFET becomes electrically conductive in accordance with search data; and a second wiring configured to apply a current to both of the first spin MOSFET and the second spin MOSFET.

Inventors: Marukame; Takao (Tokyo, JP), Inokuchi; Tomoaki (Yokohama, JP), Sugiyama; Hideyuki (Kawasaki, JP), Ishikawa; Mizue (Yokohama, JP), Saito; Yoshiaki (Kawasaki, JP), Kinoshita; Atsuhiro (Kamakura, JP), Tatsumura; Kosuke (Kawasaki, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: G11C 15/02 (20060101)

Expiration Date: 1/05/12017