Patent Number: 8,576,607

Title: Hybrid memory cell array and operations thereof

Abstract: An integrated circuit and methods of operating same are described. In an embodiment of the integrated circuit included is an array of memory cells, where each of the memory cells includes a resistance-change storage element and a thyristor-based storage element coupled in series. In embodiments of the methods included are methods for data transfer, data tracking, and operating a memory array.

Inventors: Nemati; Farid (Redwood City, CA)

Assignee:

International Classification: G11C 11/00 (20060101)

Expiration Date: 1/05/12017