Patent Number: 8,578,071

Title: Information processing apparatus and inter-processor communication control method

Abstract: An information processing apparatus includes a plurality of processors configured to form a pipeline, a plurality of communication units configured to transfer communication data between a processor in an upstream stage of the pipeline and another processor in a downstream stage and to temporarily store the communication data output from the processor in the upstream stage to the processor in the downstream stage into an internal FIFO buffer, and a memory configured to be accessible from each of the processors and each of the communication units.

Inventors: Ushiku; Toru (Tokyo, JP)

Assignee: Canon Kabushiki Kaisha

International Classification: G06F 3/00 (20060101); G06F 13/28 (20060101)

Expiration Date: 1/05/12017