Patent Number: 8,580,637

Title: Method of patterning a semiconductor device having improved spacing and shape control and a semiconductor device

Abstract: A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.

Inventors: Chen; Jhun Hua (Chang Hua, TW), Tung; Yu-Lung (Hsinchu County, TW), Chen; Chi-Tien (New Taipei, TW), Lin; Hua-Tai (Hsinchu, TW), Chen; Hsiang-Lin (Hsinchu, TW), Hsieh; Hung Chang (Hsinchu, TW), Chen; Yi-Fan (New Taipei, TW)

Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.

International Classification: H01L 21/8242 (20060101)

Expiration Date: 2022-11-12 0:00:00