Patent Number: 8,716,155

Title: Method to enhance charge trapping

Abstract: Methods of improving charge trapping are disclosed. One such method includes forming an oxide-nitride-oxide tunnel stack and a silicon nitride layer on the oxide-nitride-oxide tunnel stack. This silicon nitride layer is implanted with ions. These ions may function as electron traps or as fields. The silicon nitride layer may be part of a flash memory device.

Inventors: Ramappa; Deepak A. (Somerville, MA), Shim; Kyu-Ha (Andover, MA)

Assignee: Varian Semiconductor Equipment Associates, Inc.

International Classification: H01L 21/469 (20060101)

Expiration Date: 5/06/12018