Patent Number: 8,716,782

Title: Power semiconductor device having a thin gate insulating film with high-k dielectric materials and method for manufacturing the same

Abstract: In general, according to one embodiment, a power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a trench, a gate insulating film, and a gate electrode. The second semiconductor layer is provided on the first semiconductor layer. The trench is provided from the second semiconductor layer to the first semiconductor layer. The gate insulating film is composed of an oxide film and a protective layer formed on the oxide film. The protective layer is opposed to the second semiconductor layer across the oxide film in the trench. The oxide film covers the second semiconductor layer exposed at a sidewall of the trench and includes at least one of aluminum and yttrium. The gate electrode is made of n-type polysilicon buried in the trench in direct contact with the gate insulating film.

Inventors: Sakai; Takayuki (Tokyo, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H01L 29/66 (20060101); H01L 27/108 (20060101); H01L 21/02 (20060101)

Expiration Date: 5/06/12018