Patent Number: 8,717,089

Title: Adaptive voltage scaling using a delay line

Abstract: In one embodiment, a method includes determining, for an integrated circuit chip, a delay measurement corresponding to a first number of stages in a delay line. A power supply voltage measurement is also determined. The method determines a second number of stages correlated to the power supply voltage measurement. The second number of stages correspond to a desired timing delay. It is determined if a power supply voltage should be adjusted using a comparison based on the first number of stages and the second number of stages. A control signal is output for adjusting the power supply voltage when it is determined the power supply voltage should be adjusted.

Inventors: Zhu; Jun (San Jose, CA), Cao; Joseph Jun (Los Gatos, CA), Swarbrick; Ian (Sunnyvale, CA)

Assignee: Marvell International Ltd.

International Classification: G05F 1/10 (20060101)

Expiration Date: 5/06/12018