Patent Number: 8,719,504

Title: Efficient processing of cache segment waiters

Abstract: For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations. A total number of I/O operations to be awoken at each of an iterated instance of the waking is limited.

Inventors: Ash; Kevin John (Tucson, AZ), Benhase; Michael Thomas (Tucson, AZ), Gupta; Lokesh Mohan (Tucson, AZ), Whitworth; David Blair (Austin, TX)

Assignee: International Business Machines Corporation

International Classification: G06F 12/00 (20060101); G06F 9/46 (20060101)

Expiration Date: 5/06/12018