Patent Number: 8,719,607

Title: Advanced Pstate structure with frequency computation

Abstract: A mechanism for power management of processors using Pstates is provided. In a chiplet of a processor in a data processing system, a request is received to change a Pstate from a current Pstate to a requested Pstate. A determination is made as to whether the requested Pstate is less than or equal to a maximum Pstate. Responsive to the requested Pstate being less than or equal to the maximum Pstate, a frequency associated with the requested Pstate is computed thereby forming a computed frequency. An operating frequency of the chiplet is then adjusted to the computed frequency without involvement from a central power control entity.

Inventors: Gloekler; Tilman (Gaertringen, DE), Lichtenau; Cedric (Stuttgart, DE), Pflueger; Thomas (Leinfelden, DE), Still; Gregory S. (Raleigh, NC)

Assignee: International Business Machines Corporation

International Classification: G06F 1/08 (20060101)

Expiration Date: 5/06/12018