Patent Number: 8,722,518

Title: Methods for protecting patterned features during trench etch

Abstract: A method is provided for forming a monolithic three dimensional memory array. The method includes forming a first memory level above a substrate, and monolithically forming a second memory level above the first memory level. The first memory level is formed by forming first substantially parallel conductors extending in a first direction, forming first pillars above the first conductors, each first pillar including a first conductive layer or layerstack above a vertically oriented diode, the first pillars formed in a single photolithography step, depositing a first dielectric layer above the first pillars, etching first trenches in the first dielectric layer, the first trenches extending in a second direction. After etching, a lowest point in the trenches is above a lowest point of the first conductive layer or layerstack, and the first conductive layer or layerstack does not include a resistivity-switching metal oxide or nitride. Numerous other aspects are provided.

Inventors: Radigan; Steven J. (Fremont, CA), Raghuram; Usha (San Jose, CA), Dunton; Samuel V. (San Jose, CA), Konevecki; Michael W. (San Jose, CA)

Assignee: SanDisk 3D LLC

International Classification: H01L 21/326 (20060101); H01L 21/44 (20060101); H01L 21/82 (20060101)

Expiration Date: 5/13/12018