Patent Number: 8,722,536

Title: Fabrication method for circuit substrate having post-fed die side power supply connections

Abstract: A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to "jog" circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate.

Inventors: Douriet; Daniel (Round Rock, TX), Preda; Francesco (New Braunfels, TX), Singletary; Brian L. (Austin, TX), Walls; Lloyd A. (Austin, TX)

Assignee: International Business Machines Corporation

International Classification: H01L 21/44 (20060101)

Expiration Date: 5/13/12018