Patent Number: 8,791,552

Title: Semiconductor memory device and method for manufacturing the same

Abstract: A semiconductor memory device includes a cell array layer including a first wire, a memory cell stacked on the first wire, and a second wire formed on the memory cell. The memory cell includes a variable resistance element and a current control element The current control element includes a first conductivity-type semiconductor into which a first impurity is doped, an i-type semiconductor in contact with the first conductivity-type semiconductor, a second conductivity-type semiconductor into which a second impurity is doped, and an impact ionization acceleration unit being formed between the i-type semiconductor and one of the first conductivity-type semiconductor and the second conductivity-type semiconductor.

Inventors: Nishimura; Jun (Kuwana, JP), Yasutake; Nobuaki (Yokkaichi, JP), Okamura; Takayuki (Machida, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H01L 29/66 (20060101)

Expiration Date: 7/29/12018