Patent Number: 8,793,539

Title: External settings that reconfigure the error handling behavior of a distributed PCIe switch

Abstract: Method, computer program product, and system for performing an operation to maintain data integrity in a parallel computing system, the operation comprising providing a lookup table specifying a plurality of predefined destinations for data packets, receiving a first data packet comprising a destination address specifying a first destination, wherein the first data packet has an error of a first type, identifying, from the lookup table, an entry specifying a second destination for data packets having errors of the first type, and sending the first data packet to the second destination.

Inventors: Freking; Ronald E. (Rochester, MN), McGlone; Elizabeth A. (Rochester, MN), Tram; Nicholas V. (Rochester, MN), Wollbrink; Curtis C. (Rochester, MN)

Assignee: International Business Machines Corporation

International Classification: G06F 11/00 (20060101); H03M 13/00 (20060101)

Expiration Date: 7/29/12018