Patent Number: 8,793,560

Title: Log-likelihood ratio (LLR) computation using piecewise linear approximation of LLR functions

Abstract: Techniques for efficiently and accurately computing log-likelihood ratio (LLRs) for code bits are described. A set of code bits may be mapped to a modulation symbol in a signal constellation. Different code bits in the set may be associated with different LLR functions. A receiver obtains received symbols for a transmission sent via a communication channel. The receiver derives LLRs for code bits based on the received symbols and piecewise linear approximation of at least one LLR function. The piecewise linear approximation of each LLR function may comprise one or more linear functions for one or more ranges of input values. The receiver may select one of the linear functions for each code bit based on a corresponding received symbol component value. The receiver may then derive an LLR for each code bit based on the linear function selected for that first code bit.

Inventors: Sidi; Jonathan (San Francisco, CA), Sundaresan; Rajesh (Bangalore, IN)

Assignee: Qualcomm Incorporated

International Classification: H03M 13/03 (20060101); H03M 13/00 (20060101)

Expiration Date: 7/29/12018