Patent Number: 8,796,560

Title: Power semiconductor package with bottom surface protrusions

Abstract: A package includes a body that encapsulates a semiconductor die, the body having a first pair of opposing lateral sides, a second pair of opposing lateral sides, a top, and a bottom. The bottom has a primary surface and a plurality of protrusions that extend outward from the primary surface. When the package is mounted to a printed circuit board (PCB) the protrusions contact the PCB and the primary surface is disposed a first distance away from the PCB. The package further includes a plurality of leads that extend outward from the first pair of opposing lateral sides.

Inventors: Balakrishnan; Balu (Saratoga, CA), Hawthorne; Brad L. (Saratoga, CA), Baurle; Stephan (San Jose, CA)

Assignee: Power Integrations, Inc.

International Classification: H01L 23/48 (20060101)

Expiration Date: 8/05/12018