Patent Number: 8,815,652

Title: Semiconductor device and method of manufacturing the same and semiconductor manufacturing device

Abstract: The present invention is a manufacturing method for a semiconductor device having steps of; aligning a program head 80 having a program dot array corresponding to each OTP-ROM cell array 21 provided in areas 12 to be a plurality of semiconductor chips arranged in a semiconductor wafer to the OTP-ROM cell array 21 in one of the areas to be the plurality of semiconductor chips 12; and programming the OTP-ROM cell array 21 with a different pattern for each of the areas to be the plurality of semiconductor chips 12 by using the program head 80.

Inventors: Inoue; Fumihiko (Aizuwakamatsu, JP), Sera; Kentaro (Aizumisato-machi, JP)

Assignee: Spansion LLC

International Classification: H01L 21/82 (20060101)

Expiration Date: 8/26/12018