Patent Number: 8,816,447

Title: Transistor with reduced depletion field width

Abstract: Devices such as transistors having an oxide layer that provide a depletion field in a conduction channel. A barrier layer is formed over the oxide layer. A gate electrode is formed over the barrier layer. The barrier layer and gate electrode are configured to reduce the width of the depletion field absent a voltage applied to the gate electrode.

Inventors: Meng; Shuang (Boise, ID), Derderian; Garo J. (Boise, ID), Sandhu; Gurtej S. (Boise, ID)

Assignee: Round Rock Research, LLC

International Classification: H01L 29/76 (20060101); H01L 29/94 (20060101); H01L 31/062 (20120101); H01L 31/119 (20060101); H01L 31/113 (20060101)

Expiration Date: 8/26/12018