Patent Number: 8,819,684

Title: Synchronizing multiple threads efficiently

Abstract: In one embodiment, the present invention includes a method of assigning a location within a shared variable for each of multiple threads and writing a value to a corresponding location to indicate that the corresponding thread has reached a barrier. In such manner, when all the threads have reached the barrier, synchronization is established. In some embodiments, the shared variable may be stored in a cache accessible by the multiple threads. Other embodiments are described and claimed.

Inventors: Kottapalli; Sailesh (San Jose, CA), Crawford; John H. (Saratoga, CA)

Assignee: Intel Corporation

International Classification: G06F 9/46 (20060101); G06F 12/00 (20060101)

Expiration Date: 8/26/12018