Patent Number: 8,823,343

Title: Power amplifying circuit, DC-DC converter, peak holding circuit, and output voltage control circuit including the peak holding circuit

Abstract: A power amplifying circuit includes a first field effect transistor and a second field effect transistor that are connected in series, are interposed between a high potential power line and a low potential power line, and drive a load; a predriver that generates, in response to an input signal, gate voltages applied to the first field effect transistor and the second field effect transistor respectively; and a variable power source that supplies source voltages to the high potential power line and the low potential power line respectively, and is configured to control the source voltages.

Inventors: Tsuji; Nobuaki (Hamamatsu, JP)

Assignee: Yamaha Corporation

International Classification: G05F 1/00 (20060101)

Expiration Date: 9/02/12018