Patent Number: 8,824,184

Title: Semiconductor memory devices

Abstract: A semiconductor memory device includes a stacked structure including a plurality of wordline structures sequentially stacked that each include: a plurality of wordlines with sidewalls and extending in a first direction on the substrate, and a connecting pad extending in a second direction on the substrate and being connected in common to the plurality of wordlines. A plurality of interconnections at a height over the substrate are connected to the connecting pads of the wordline structures, respectively. The device further includes bitlines substantially vertical to a top surface of the substrate and crossing one of the sidewalls of the plurality of wordlines, and memory elements between the bitlines and the plurality of wordlines, respectively. A length of the connecting pad in the second direction is substantially equal to a product of a minimum pitch between the interconnections and a stack number of one of the plurality of wordlines.

Inventors: Baek; Ingyu (Seoul, KR), Park; Chanjin (Yongin-si, KR), Ju; Hyunsu (Hwaseong-si, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: G11C 5/02 (20060101)

Expiration Date: 9/02/12018