Patent Number: 8,824,223

Title: Semiconductor memory apparatus with clock and data strobe phase detection

Abstract: A semiconductor memory apparatus includes an internal tuning unit configured to tune a generation timing of a data input strobe signal according to a phase difference between an external clock signal and a data strobe clock signal, and a data input sense amplifier configured to transmit data bits to a global line in response to the data input strobe signal.

Inventors: Lee; Sang Hee (Ichon, KR)

Assignee: SK hynix Inc.

International Classification: G11C 11/4063 (20060101)

Expiration Date: 9/02/12018