Patent Number: 8,871,640

Title: Method of manufacturing semiconductor chip

Abstract: A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer includes the steps of preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth that does not reach the release layer; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semiconductor layer exposed by the separation to expose the bottom of the electrical conductor.

Inventors: Yonehara; Takao (Atsugi, JP), Sakaguchi; Kiyofumi (Mobara, JP), Kawase; Nobuo (Yokohama, JP), Nakagawa; Kenji (Isehara, JP)

Assignee: Canon Kabushiki Kaisha

International Classification: H01L 21/50 (20060101)

Expiration Date: 2018-10-28 0:00:00