Patent Number: 8,872,271

Title: Pass gate, semiconductor memory, and semiconductor device

Abstract: According to one embodiment, a pass gate provided between a data holding unit of an SRAM cell and a bit line, includes a first tunnel transistor and a first diode connected in series between the data holding unit and the bit line, and a second tunnel transistor and a second diode connected in series between the data holding unit and the bit line and connected in parallel to the first tunnel transistor and the first diode. Gate electrodes of the first tunnel transistor and the second tunnel transistor are connected to a word line. The first diode and the second diode have rectification in mutually opposite directions between the data holding unit and the bit line.

Inventors: Hokazono; Akira (Kawasaki, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H01L 21/70 (20060101)

Expiration Date: 2018-10-28 0:00:00