Patent Number: 8,878,715

Title: Time-to-digital converting circuit and digital-to-time converting circuit

Abstract: A time-to-digital converting circuit includes a first flip-flop and a second flip-flop. The time-to-digital converting circuit a first delay controlling circuit that outputs a first data signal obtained by controlling a delay time of the reference data signal input thereto via the first signal input terminal based on the first output signal and a first clock signal obtained by controlling a delay time of the reference clock signal input thereto via the second signal input terminal based on the first output signal.

Inventors: Miyashita; Daisuke (Kawasaki, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H03M 1/50 (20060101)

Expiration Date: 2019-11-04 0:00:00