Patent Number: 8,880,852

Title: Detecting logically non-significant operation based on opcode and operand and setting flag to decode address specified in subsequent instruction as different address

Abstract: A method, apparatus, and program product execute instructions of an instruction stream and detect logically non-significant operations in the instruction stream. Then, based on that detection, a target or source address of a subsequent instruction is adjusted. In some instances, doing so enables a greater number of addresses, e.g., registers, to be accessed in a given number of bit positions within an instruction format.

Inventors: Hickey; Mark J. (Rochester, MN), Muff; Adam J. (Rochester, MN), Tubbs; Matthew R. (Rochester, MN), Wait; Charles D. (Byron, MN)

Assignee: International Business Machines Corporation

International Classification: G06F 9/318 (20060101)

Expiration Date: 2019-11-04 0:00:00