Patent Number: 9,385,145

Title: Double thin film transistor structure with shared gate

Abstract: A double thin film transistor includes a first semiconductor layer, a gate, a second semiconductor layer, a first insulating layer, a second insulating layer, a first source, a first drain, a second source and a second drain. The first semiconductor layer is disposed over a substrate. The gate is disposed over the first semiconductor layer. The second semiconductor layer is disposed over the gate, and the first and second semiconductor layers are the same conductive type. The first insulating layer is disposed between the first semiconductor layer and the gate. The second insulating layer is disposed between the gate and the second semiconductor layer. The first source and the first drain are disposed between the substrate and the second insulating layer. The second source and the second drain are disposed over the second insulating layer.

Inventors: Chiang; Shin-Chuan (Taipei, TW), Lu; Ya-Ju (New Taipei, TW), Chen; Yu-Hsien (Hsinchu County, TW), Huang; Yen-Yu (Bade, TW)

Assignee: CHUNGHWA PICTURE TUBES, LTD.

International Classification: H01L 27/12 (20060101)

Expiration Date: 2020-07-05 0:00:00