Patent Number: 9,431,292

Title: Alternate dual damascene method for forming interconnects

Abstract: After forming at least one opening in a material stack comprising a sacrificial metal template layer overlying a first dielectric material layer, a sacrificial material portion is deposited in the at least one opening as a place holder for an interconnect structure later formed. Next, the sacrificial metal template layer is removed and a second dielectric material layer is formed to fill voids that were previously occupied by the sacrificial metal template layer. After removing the sacrificial material portion from the at least one opening, an interconnect structure is formed within the at least one opening.

Inventors: Bonilla; Griselda (Fishkill, NY), Choi; Samuel S. S. (Beacon, NY), Filippi; Ronald G. (Wappingers Falls, NY), Huang; Elbert E. (Carmel, NY), Lustig; Naftali E. (Croton on Hudson, NY), Simon; Andrew H. (Fishkill, NY)


International Classification: H01L 21/4763 (20060101); H01L 21/768 (20060101); H01L 23/532 (20060101)

Expiration Date: 2020-08-30 0:00:00